Testing AIP Modules in High-Volume Production for 5G Applications: Part 2

This article is a condensed version of an article published in the November-December 2020 issue of Chip Scale Review, p. 31. Adapted with permission. Read the original article at https://www.chipscalereview.com/issues/ChipScale_Nov-Dec_2020-digital.pdf#page=33.

Jose Moreira, Advantest Senior Staff Engineer, SoC R&D.

This article is a follow-up to an article [1] where we described options for high-volume over-the-air (OTA) testing of antenna-in-package (AIP) modules with automated test equipment (ATE). In this follow-up article we present measurement results for two OTA testing approaches: far-field and radiating near-field OTA. But before we go to the measurement results, we need to first define an AiP device under test (DUT) that can be used for the measurements.

Creating an AiP Evaluation Vehicle
Proper evaluation of an ATE OTA measurement setup requires an AiP module. Using, for example, a reference antenna instead of an AiP DUT (for instance, a reference horn antenna) would not take into account all the components specific to an ATE implementation like the DUT test-fixture PCB or the DUT socket. Using a commercial AiP module is also not currently feasible, since few available commercial AiP modules are would come with IP restrictions on using them to publicly show OTA measurement results.
Therefore, we decided to create the simple AiP module shown in Figure 1. It was manufactured in a multilayer PCB with a Rogers 4350B top layer and a BGA ball grid array on the bottom. The antenna array is composed of a 2 by 2 array of dual polarized patch antennas [2]. They are microstrip-feed with two quarter-wavelength transformers for impedance matching. This antenna design is narrow-band, was tuned for 28 GHz, and can support our 100-MHz measurement modulation range. We used a 0.4-mm pitch for the BGA array on the bottom of the PCB. Note that AiP modules come in a multitude of package types [3]. We chose this one because it was the simplest to design and manufacture.

Figure 1: Simple antenna in package module demonstration vehicle for OTA measurements.

Because we designed the antenna array using a microstrip feed (for simplicity), we needed to supply a waveform with a 180-degree phase difference on both sides of the array for each polarization to obtain an antenna beam that is in the horizontal direction. By selecting the appropriate phase difference, we could move the beam direction as expected from an AiP phased-array antenna. One critical point on OTA testing of AiP modules with ATE is that a DUT socket is always a must. The challenge is that the socket lid will have an impact on the antenna array beam, as shown in Figure 2. . One can only try to minimize its impact by the proper design of the socket and its material selection (especially the lid), but at the same time there are other conflicting requirements in a high-volume production test cell. These include, for example, supporting hot and cold testing as well as guaranteeing a proper electrical contact into the electrical side of the socket even in the presence of a small package warpage.

Figure 2: Socket lid impact in the AiP module antenna array beam.

An additional requirement to achieve a complete AiP module emulation is the active part—that is, the silicon die. To emulate that part, we used an external evaluation board (Anokiwave 0151-DK), which provides four dual-polarized RF channels with independent phase and gain control of each channel. With this complete setup shown in Figure 3, we can fully emulate the OTA testing of an AiP module. In the ATE system used for the presented measurements, only two ATE mmWave measurement channels were available. Therefore, we used a solid-state switch to switch between polarizations.

Figure 3: Block diagram of the used ATE OTA measurement setup.

Figure 4 shows the DUT test fixture (or loadboard) with the far-field socket installed but without a DUT. For the electrical side of the AiP module we used an elastomer socket because we needed to support 28-GHz signaling. The DUT test fixture is a simple mmWave design with the signals from the Anokiwave evaluation board connected to the DUT AiP via a microstrip trace. We also implemented some auxiliary test and calibration structures. The Anokiwave evaluation board resides on a garage space bellow the DUT test fixture. It is powered by the ATE power supplies, and it is programmed with ATE digital channels using an SPI interface. Figure 5 shows the ATE system configured for far-field and radiating near-field OTA measurements. All the measurements presented were performed using an Advantest V93000 Wave Scale mmWave ATE system.

Figure 4: DUT test fixture.

 

Figure 5: ATE measurement setup showing the far-field setup (left) and radiating near-field setup (right).

Before we proceed, we need some reference numbers for the far-field distance from the antenna array. Figure 6 shows the AiP antenna-array dimensions. It also shows a computation of the far-field distance using the Fraunhofer distance equation [4]. The computed far-field starting distance is 32 mm for this case.

Figure 6: Far-field distance computation for the antenna array.

Results with a Far-Field OTA Measurement Setup
In the far-field setup (Figure 5, left), the measurement antenna is a dual-polarized horn antenna (Ainfo LB-SJ-180400) located 10 cm from the DUT AiP (clearly within the far-field zone). We know the measurement antenna gain, and since the measurement antenna to DUT distance is fixed, we also know the air-loss. We can use these values to calibrate the measured results. Figure 7 shows the measured error vector magnitude (EVM) and corresponding constellation diagram measurement of the AiP DUT using a 28-GHz 5G QAM64 waveform with 100-MHz modulation bandwidth. This measurement is performed with the entire antenna array transmitting and pointing in the horizontal direction to the measurement antenna. Only the H-polarization field is measured (see Figure 3).

As previously mentioned, this AiP device is intended to be a demonstration vehicle; due to its simplistic design one cannot expect good performance. This measurement setup is straightforward and provides an easy way to correlate with a 5G-compliant bench measurement setup. Although the far-field OTA measurement setup is excellent for characterization, as discussed in [1], it presents major challenges for test-cell integration in a multisite high-volume testing setup due to its mechanical requirements.

Figure 7: Measured transmitted far-field EVM and constellation diagram of a 28-GHz 5G QAM64 waveform (100-MHz modulation bandwidth) for H-polarization.

Results with a Radiating Near-Field OTA Measurement Setup

In the radiating near-field setup (Figure 5, right), a dual-polarized patch measurement antenna is used on the socket (as shown in Figure 4 of [1]). This measurement antenna is set 11 mm from the AiP DUT, so it is within the near-field region as shown in the Figure 6 computations. The 11-mm distance was selected based on the standing-wave effect that is present on any radiating near-field OTA setup as described in [1,5]. Figure 8 shows the EVM and constellation diagram measurement of the AiP DUT in the exact same conditions as for the far-field measurements shown in Figure 7.

Figure 8: Measured transmitted radiating near-field EVM and constellation diagram of a 28-GHz 5G QAM64 waveform (100-MHz modulation bandwidth) for H-polarization.

Figure 8 shows a measured 2.76% EVM value for the radiating near-field, while the far-field EVM measured result (Figure 7) was 2.74%. Although in this example the EVM results correlate, for a different AiP module with a different antenna array or a different design of the measurement antenna and its distance to the DUT, the difference between a far-field and radiating near-field OTA measurement setup might be significant. Other issues relate to calibration, and other possible measurements include phase linearity and ACLR, as described in [7].

Summary
OTA testing with ATE is possible in different configurations: in the far-field, radiating near-field, and reactive near-field as described in [1]. An OTA loopback configuration can also support OTA testing in some circumstances. We have shown that parametric measurements can be done in the radiating near-field if careful attention is placed on the measurement antenna design and also on the choice of the distance between the DUT and the measurement antenna. In the radiating near-field case a straightforward value correlation is not always possible with the far-field. But in a production setup, the important task is to be able to differentiate good from bad devices, and that is achievable with a radiating near-field OTA configuration. As shown in [1], the radiating near-field has significant advantages for high-volume production in terms of complexity and cost.

Acknowledgements
We would like to thank Sui-Xia Yang and Frank Goh from Advantest for the test-program development and also for the measurements execution. We would also like to thank Natsuki Shiota, Aritomo Kikuchi, Hiromitsu Takasu, Hiroyuki Mineo, and Yasuyuki Kato from Advantest for their technical contribution for this project. We would like also to thank Prof. Jan Hesselbarth from the University of Stuttgart for his continuing collaboration on OTA testing.

References
1. J. Moreira, “Testing AiP Modules in High-Volume Production for 5G Applications,” Chip Scale Review, May/June 2020.
2. Kim-Lu Wong, “Compact and BroadBand Microstrip Antennas,” Wiley, 2002.
3. Curtis Zwenger, Vik Chaudhry, “Antenna in package (AiP) technology for 5G growth,“ Chip Scale Review March/April, 2020.
4. Meik Kottkamp, et al., ”5G New Radio Fundamentals, Procedures, Testing Aspects,” Rohde & Schwarz.
5. J. Moreira, J. Hesselbarth, K. Dabrowiecki, “Challenges of over the air (OTA) testing with ATE,” TestConX China, Shanghai, Oct. 29, 2019.
6. C. Parini et al., Theory and Practice of Modern Antenna Range Measurements, IET 2014.
7. J. Moreira, “Testing AiP modules in high-volume production for 5G applications,” Chip Scale Review, November-December 2020, p. 31.

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T2000 with Multiple Interface Unit Supports RF SiP OTA Test

By Koji Miyauchi, T2000 Business Unit Solution Department, Advantest Corp.

Introduction
In recent years, the proliferation of the IoT has focused attention on low-power-wireless applications. IoT modules incorporating functions such as Bluetooth Low Energy (BLE) transceivers, MCUs, and power-management circuitry are becoming system-in-package (SiP) and even one-chip devices. Such devices increase the demand for a mass-production test environment that can measure them in a short time. To meet this demand, we at Advantest have focused on combining conventional ATE test and system-level test (SLT). Specifically, we have developed a hybrid SLT system that combines ATE test in the form of a T2000 system with SLT implemented using a multiple-interface-unit (MIU) box attached to the T2000. Advantest customers are using such systems today. In this article, we describe the hybrid SLT using a BLE SiP module as an example.

IoT and low-power wireless
The IoT represents a rapidly growing market for which high-speed wireless connections suitable for various usage systems are indispensable. The arrival of digital transportation is accelerating this trend. In addition to high speed, low power is crucial for IoT wireless communications, leading to the adoption of low-power wireless standards such as BLE and ZigBee for short-range communication and LoRa and Sigfox for long-range communication (Table 1).

Table 1. Low-Power Wireless Standards and Features

As shown in Figure 1, the ratio of BLE usage is high compared with usage of other communications standards for low-power wireless applications, and the average annual growth rate of BLE is 24.5%. IoT modules that can implement these standards can take various forms, from module-level devices that combine discrete components to SiP and single-chip devices. Due to the increasing demand for higher functionality, power saving, and miniaturization in recent years, IoT module functions increasingly will be integrated into one device. With the current acceleration of the IoT, the ratio of such SiPs and single chips to modules with discrete components is increasing, thereby driving an increasing demand for a production test environment that can quickly measure a large number of highly integrated devices at once . In addition, IoT modules built with SiP devices or single chips enable a wide variety of products optimized for each application.

Figure 1. BLE finds significant use in low-power wireless applications.

Technical challenges for SiP
An IoT module is a composite device that packages processing, power-supply, wired-communications, and wireless-communications functions. To test such a composite device, the tester must have the conventional capabilities required for testing multiple devices such as an MPU, a transceiver IC, and a PMIC. At the same time, a trend in the semiconductor manufacturing process is emerging that drives an increase in the ratio of SLT to conventional final test. Currently, there is a demand for system upgrades that incorporate the trimming process using conventional ATE, rather than system upgrades that combine actual end-application-level machines such as motherboards with measuring instruments. As shown in Table 2, the SiP presents technical challenges as well as benefits. The increasing demand for SiPs and the technical issues caused by their introduction are the reasons why the ATE environment is required instead of an upgraded SLT system using jigs such as motherboards.

Table 2. SiP Benefits and Technical Challenges for Testing

 

Asynchronous testing with ATE
One of two methods can help to solve the technical issues of IoT module SiPs, depending on the production volume:

1. A high-productivity measurement environment using multiple simultaneous-measurement SLT systems.
2. A hybrid environment that realizes SLT with conventional ATE test.

Here, we focus on the second: a hybrid environment that realizes SLT with a conventional ATE tester. This method is particularly suitable for high-mix production.
In conventional device tests, ATE takes the initiative in controlling the DUT to perform tests efficiently. However, SLT provides test in actual application-level use case, in which the application runs on the OS inside the CPU of the DUT.　In this application environment, with processing timing unique to the DUT, test operations are performed in accordance with the internal clock in the DUT’s CPU, so the output timing is uncertain. In other words, asynchronous testing becomes an issue when performing SLT on an ATE system. The testing must be performed mainly by DUT, since ATE is not good at test operations that are out of sync with itself.

To solve the problems related to asynchronous testing and SiP technical challenges, Advantest has developed hybrid SLT, which is a combination of SLT using an MIU box and ATE test. The MIU box is a unit that performs the SLT of IoT modules using tester resources and a processor that can operate asynchronously (Figure 2). The MIU box is controlled by the T2000 via Ethernet. Asynchronous test is realized while interlocking with the tester OS by letting the MIU execute the test script for SLT using the TSS (T2000 System Software) application software that has been used conventionally in the T2000.

Figure 2. The Hybrid SLT solution combines a T2000 tester and MIU box.

 

Implementation example of 16 parallel tests by OTA

Figure 3 shows an example of the testing of 16 BLE-equipped IoT modules using the T2000 MIU solution. Four DUTs can be measured for each MIU board. In addition, the MIU box is equipped with four MIU boards and can measure 16 devices. Moreover, because BLE has 40 channels, simultaneous measurement can be performed while avoiding channel interference. A performance board (PB) or load board with a shield function prevents radio-wave interference with a dedicated socket for OTA and the adjacent tester. Before and after the RF OTA test, digital tests and DC tests using conventional tester resources are performed.

Figure 3. This hybrid SLT example shows the testing of 16 BLE-equipped IoT modules.

The mass-production test steps in hybrid SLT (excluding the conventional chip-test items) are as follows; these tests are conducted asynchronously between the DUTs using OTA:

• Tx power. The DUT uses the received signal-strength indicator (RSSI) function of the RF front end to measure power while continuously transmitting Tx signals with direct test mode (DTM). [Is this correct: DTM stands for “direct test mode”?]
• RSSI. As with the Tx power measurement, the DUT receives the Tx signal from the RF front end with DTM, and the RSSI value is read out with the MIU.
• Packet error rate (PER). This test reads the PER while the DUT and RF front end communicate in the actual usage environment.
• Data transfer. After performing the advertising scan, this step connects the DUT and RF front end, sends and receives data at the application layer, compares the data with the expected value, and makes a judgment.

A test system can employ three types of OTA test methods—radio wave, electrostatic induction, and electromagnetic induction—depending on the application requirements. For this example, we have adopted electrostatic induction and have developed a socket and antenna board to implement this method. The Figure 4 block diagram shows the connection from the MIU box to the DUT as well as a photo of the MIU box and test head. Figure 5 shows results from the BLE PER test case.

Figure 4. The block diagram (left) shows the DUT-to-MIU box connection, while the photo (right) shows the MIU box and test head.

Figure 5. OTA test of the RF front end to DUT connection (left) yields the BLE PER test results Shmoo Plot (right).

Conclusion

Hybrid SLT is ideal for testing the ever increasing number of IoT modules. Since the traditional SLT communicates in an actual application-level use case, the overhead of test time tends to increase. However, the hybrid SLT can realize the concurrent conventional-ATE test and SLT, thereby shortening the total test time. Hybrid SLT can support wireless communication standards other than BLE, so customers can take advantage of Advantest’s wide range of the SLT solutions.

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High-Volume Production Test of AiP Modules for 5G Applications

This article is a condensed version of an article published in the May-June 2020 issue of Chip Scale Review, p. 20. Adapted with permission. Read the original article at http://fbs.advantageinc.com/chipscale/may-jun_2020/22/. 

By Jose Moreira, Senior Staff Engineer, SOC R&D, Advantest

The arrival of 5G promises enhanced mobile broadband (eMBB), massive machine-type communication (mMTC), and ultrareliable low-latency communication (URLLC). But as 5G rolls out, the test community faces challenges and opportunities. That’s particularly true regarding the antenna arrays that will connect handsets to base stations.

5G New Radio (5G NR) defines two ranges, frequency range 1 (FR1) and frequency range 2 (FR2). FR1 includes the sub-6-GHz frequencies in use for previous generations of cellular technologies, but FR2 opens up mmWave frequencies above 24 GHz for 5G deployment. 5G NR leverages the FR2 frequencies to achieve larger modulation bandwidths (for example, 800 MHz). However, the high transmission losses at these frequencies require the use of antenna arrays for multiple-input and multiple-output (MIMO) functionality and to focus the transmission beam (beam forming) in both the base station and the consumer’s handset. These arrays come in the form of antenna-in-package (AiP) modules.

For the handset, these AiP modules will usually have an array of dual-polarized patch antennas for top firing and, in some instances, an array of dipole antennas for side firing (Figure 1). 

Figure 1. This example of a generic antenna array module comprises 12 dual-polarized patch antenna elements and seven dipole antenna elements.

To minimize RF losses to the antenna radiators, the AiP modules include RF integrated circuits that provide modulated mmWave signals to the AiP antenna array with the needed gain and phase to each radiating element. The modules then usually only require power, digital control signals, and modulated intermediate-frequency (IF) signals.

AiP modules for 5G handsets must be small to fit into the modern cellphone form factor, and multiples of them need to be used in a single cellphone because the user’s hand position has a significant impact on the transmitted beam loss. Also, the AiP modules in a cellphone might not be all equal, but in fact have different antenna configurations depending on the handset design.

Regardless of configuration, these AiP modules must be tested. The 3GPP standard defines three methods for the over-the-air (OTA) standard compliance testing of AiP modules: direct far field, indirect far field, and near-field to far-field transformation. Each of these methods have advantages and disadvantages, but they all require relatively large test chambers and a complex manipulator to rotate the AiP device under test (DUT) or the measurement antenna.

These methods are neither practical nor necessary for high-volume production testing, where the objective is to check the functionality of the antenna under test (AUT), not its compliance. Low cost of test is critical because most of the end applications are consumer oriented. Also, to keep costs down it is important to reuse as much as possible the test-cell infrastructure already deployed for testing RF integrated circuits.

This paper presents three possible options for the production OTA testing of AiP modules with ATE: far-field testing, radiating near-field testing, and reactive near-field testing. The book Theory and Practice of Modern Antenna Range Measurements¹ provides details on the transition from the near field to the far field. For the purposes of this discussion, it suffices to note that there is no hard boundary between near and far field, but a continuous transition where the radiated waves become locally more planar as they propagate away from the radiating antenna. From an antenna-measurement perspective, the far-field region is the best because the radiated waves are locally planar, and the measurement antenna is too far away to have an impact on the AUT. 

But the far-field distances also imply large dimensions for the measurement setup, and radiating and reactive near-field testing approaches offer more compact alternatives.

Figure 2. These examples of OTA ATE far-field measurement setup show a motorized linear stage (left) and a static setup (right).

OTA far-field testing

Figure 2 shows two examples of a simple far-field measurement setup on an ATE system. This approach is excellent for an initial start with OTA testing on ATE because one can start in the safety of the far-field measurement range while doing correlation and debugging of the AiP DUT using the ATE system. Calibration on a far-field setup is also trivial using standard antenna measurement calibration procedures1. The problem arises when considering high-volume production by integrating a far-field OTA methodology on a standard ATE test cell.

The mechanical dimensions required for a far-field OTA test solution prevent the usage of standard ATE test-cell commercial handlers, thereby requiring custom robotic handlers and creating additional costs. Cost reduction through multisite implementation on ATE is also nontrivial with a far-field OTA ATE implementation.

OTA radiated near-field testing

One approach to integrating an OTA measurement setup into a standard ATE test cell is to move the measurement antenna into the radiating near-field region. Figure 3 shows low-cost radiating near-field test sockets for a patch-type antenna array AiP. In this example, the measurement antenna is 11 mm from the DUT AiP antenna array. A radiating near-field antenna test has the advantages of easy integration within a standard ATE test cell along with easy multisite implementation.

Figure 3. These examples of low-cost radiating near-field OTA sockets support manual ATE-based OTA testing.

Because in a production test environment the objective is to identify failed AiP modules and not to characterize them, one could assume that there would be some easy correlation between good AiP modules tested in a far-field setup with failing AiP modules tested on a near-field setup, assuming a comprehensive list of performed tests. This is a valid thinking, but one needs to be aware of two important drawbacks on a radiating near-field measurement setup. The first is that the measurement antenna is now so close to the AiP DUT antenna array that it will have an impact on the DUT AiP antenna elements (antenna detuning) and can even result in a standing-wave effect.

The second drawback is shown in Figure 4. 

Figure 4. In this example, the distance from the measurement antenna to the different antenna array elements on an AIP DUT differs.

Because only one measurement antenna is used, depending on the DUT AiP antenna array geometry, the distance of each DUT antenna array element to the measurement antenna will be different. This can have a significant impact on a worst-case scenario^2,3. Finally, calibration in the radiating near-field is nontrivial. If a golden-device calibration is used, results are critically dependent on the golden device’s performance, and absolute measurements are not possible.

OTA reactive near-field testing

An alternative is to measure the DUT AiP antenna array in the reactive near field. In this case, a classical measurement antenna cannot be used because in the reactive near-field range it would have a dramatic effect on the DUT AiP antenna elements. To measure on the reactive near field, the antenna or probing element needs to be very small. Figure 5 shows one reactive near-field probing concept for OTA ATE that has been patented by Advantest using two very thin parallel needles to probe the electric or magnetic field on the DUT AiP reactive near field. The main advantages are that each element of the DUT AiP array is individually measured (power and phase) and that the probe size is very small to minimize the disturbance of each radiating element. This concept is explained in more detail in other papers^4,5. 

Figure 5. This near-field probing concept for OTA ATE uses two very thin parallel needles to probe the electric or magnetic field on the DUT AiP reactive near field.

Figure 6 shows an example of a prototype reactive near-field socket3. Here, measurement of a dual-polarized 2×2 AiP array results in eight individual signals. To keep ATE resources to a minimum, a solid-state relay switches each of the antenna/polarization signals in series to the ATE measurement instrument. A parallel measurement approach is also possible but requires eight ATE measurement instruments. The optimal setup will depend on a detailed cost-of-test analysis.

Figure 6. In this prototype reactive near-field socket, a dual-polarized 2×2 AiP array is measured resulting in eight individual signals.

Summary

For OTA testing with ATE of AiP modules, there is no right or wrong answer. Depending on the testing requirements and testing stage (for example, initial ramp-up or mature high-volume manufacturing), the OTA test strategy might be different. Figure 7 shows a high-level comparison of the different OTA test strategies presented in this paper.

In a future paper we will use a custom-designed 28-GHz 2×2 path antenna array in a 0.4-mm-pitch BGA package to compare the different approaches in terms of OTA measurement results with the Advantest V93000 Wavescale Millimeter CardCage ATE system.

Figure 7. This chart shows the advantages and disadvantages of three OTA test strategies in an ATE environment.

ACKNOWLEDGEMENTS

We would like to thank Natsuki Shiota, Aritomo Kikuchi, Hiromitsu Takasu, Hiroyuki Mineo, Sui-Xia Yang, and Frank Goh from Advantest for their support and collaboration on the OTA project development. We would like also to thank Prof. Jan Hesselbarth from the University of Stuttgart.

REFERENCES

1. Clive Parini, et al., Theory and Practice of Modern Antenna Range Measurements, IET, 2014.
2. Jose Moreira, Jan Hesselbarth, and Krzysztof Dabrowiecki, “Challenges of Over The Air (OTA) Testing with ATE,” TestConX China, Shanghai, October 29, 2019.
3. Natsuki Shiota, Aritomo Kikuchi, Hiroyuki Mineo, Jose Moreira, and Hiromitsu Takasu, “Socket Design and Handler Integration Challenges in Over the Air Testing for 5G Applications,” TestConX 2020, May 2020.
4. Jan Hesselbarth, Georg Sterzl, and Jose Moreira, “Probing Millimeter-Wave Antennas and Arrays in their Reactive Near Field,” 49th European Microwave Conference, 2019.
5. Utpal Dey, Jan Hesselbarth, Jose Moreira, and Krzysztof Dabrowiecki, “Over-the-Air Test of Dipole and Patch Antenna Arrays at 28 GHz by Probing them in the Reactive Near-Field,” To be presented at the 95th ARFTG Microwave Measurement Conference, August 6, 2020.

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Wave Scale RF8 – Enabling the Next WAVE in RF Communications Test

By Dieter Ohnesorge, Product Manager, RF Solutions, Advantest Corp.

Over the years, Advantest has remained at the forefront of test innovation through close collaboration with customers and partners, and by keeping our finger on the pulse of industry and market trends. We launched the Wave Scale family of test cards for our V93000 system-on-chip (SoC) test platform just over four years ago, and in that short time, we have greatly expanded the line with new products designed to meet burgeoning test demands – e.g., Wave Scale RF, Wave Scale MX, and Wave Scale Millimeter.

The test economics of state-of-the-art smartphones, tablets and routers demand highly parallel RF test. Now, we are addressing this next wave in RF communications test, enabled by Wi-Fi 6E, operating in the 6GHz band and coming up to 7.125GHz. This forthcoming update to the Wi-Fi standard will extend the features and capabilities, including higher performance, lower latency, and faster data rates—for this higher band. Our new Wave Scale RF8 card enables parallel test capabilities for Wi-Fi 6E, as well as for 5G-NR transceivers, LTE-Advanced Pro and internet of things (IoT) devices. 

The extension to Wi-Fi 6E will make available 1200MHz of additional bandwidth in the unlicensed frequency spectrum (see Figure 1). Compared to these 1200MHz, the 2.4GHz band has just three non-overlapping channels with a total bandwidth of 60MHz, and is already crowded with multiple users competing for bandwidth. Even with 25 channels and an additional 500MHz of bandwidth, the 5GHz band gets filled up quickly – a problem that has become even more apparent with many people in close proximity tapping into Wi-Fi to work in from home or attend school remotely. 

Figure 1. The chart illustrates the importance and benefits of Wi-Fi 6E. Wi-Fi at 2.4GHz uses 60MHz total bandwidth with up three non-overlapping channels, while the 5GHz band adds 500MHz and up to 25 channels. Wi-Fi 6E now adds a massive 1200MHz to the existing Wi-Fi bandwidth, adding up to 59 additional channels.

With the 6GHz band, however, comes added channels and a substantial extension of 1200MHz in usable bandwidth. Moreover, all three bands can be used simultaneously – e.g., users can read and send email in the 2.5GHz band, place Wi-Fi calls in the 5GHz band, and download streaming content in the 6GHz band. Good news for users, this nevertheless creates new challenges with respect to testing these communication devices.

Wave Scale RF 8 is capable of both highly parallel multisite and in-site parallel testing, providing a new dimension of test coverage and economics. Testing both the send and receive channels takes a fraction of the time that would be required using a traditional test flow, and it can perform high multisite testing using native ATE resources, all within the V93000 test head. Advantest is the first in the industry to enable such high multisite parallelism for these applications, providing an unmatched test time benefit (see Figure 2).

Figure 2. The benefits of massively parallel test are illustrated here. Stacking tests test in a parallel test flow rather than one-by-one serial test drastically reduces test times; parallel mission-mode tests are reduced by up to 50%.

The card’s RF-optimized architecture comprises four complete RF subsystems to achieve high-throughput testing. Within each subsystem is an independent modulated source, a waveform generator/digitizer, scattering parameters, and a test processor that can make multiple RF measurements in the shortest possible time. Each card includes 32 RF ports, true parallel stim measurement ports, and – as mentioned earlier – operates at up to 8GHz with a modulation bandwidth of 200MHz. Its wide-frequency capability is a vital aspect of Wave Scale RF8 – the Wi-Fi6E standard can actually go up to 7.125GHz, so is well covered by the 8GHz capability of the Wave Scale RF solution.

Continually staying ahead of the industry curve is an important aspect of Advantest’s brand promise to our customers. We focus on having the solution in place that customers will need in order to adapt to new test requirements. With Wave Scale RF8, we have made sure that we can accommodate the massively parallel testing that advanced communications devices demand. With multiple independent subsystems in a single card, Wave Scale RF8 delivers the cost-efficient production solution for next-generation Wi-Fi 6E and cellular devices.

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System-Level Test Methodologies Take Center Stage

By Fabio Pizza, Business Development Manager, Advantest Europe

Note: System-level test (SLT) continues to expand in importance throughout the industry. In past newsletters, we have published articles looking at the company’s efforts in this space, primarily for the storage market, as it offered the most immediate opportunity for implementing SLT. Now, rising industry demand, driven by mission-critical applications, has put SLT at the forefront for Advantest company-wide.

Because electronic systems for all applications in end-user markets must provide the highest possible reliability to match customers’ quality expectations, semiconductor components undergo multiple tests and stress steps to screen out defects that could arise during their lifecycle. Due to new semiconductor devices’ increasing design complexity and extreme process technology, increased test coverage is needed to meet stricter quality requirements.

To solve this problem, system-level test that mimics a device’s real-world operating conditions is increasingly being adopted as one of the final steps in the production testing process for complex systems-on-chip (SoCs). In the past, system manufacturers typically implemented SLT on a sample basis, plugging devices into systems to check that the devices would function in an application. Semiconductor companies have now adopted SLT methodology throughout the test process to increase test coverage and product quality for mission-critical applications (Figure 1).

Figure 1. Advanced technology is driving changes in test requirements, creating the need for integrated SLT approaches throughout the test flow.

Advantest provides customers with an end-to-end test solution, from ATE to SLT, in line with the company’s Grand Design, created to ensure that Advantest remains at the forefront of our industry. The central vision of this corporate-wide plan is for Advantest to strengthen its contributions to customer value in the semiconductor business by enriching, expanding and integrating our test and measurement solutions throughout the entire value chain, as shown in Figure 2.

Figure 2. System-level test is crucial to the mission of Advantest’s Grand Design – “Adding Customer Value in an Evolving Semiconductor Value Chain.”

Recent market and financial analyst commentary supports Advantest’s view that SLT is the way of the future and that our expertise in this area provides new growth opportunities. Following our briefing on SLT in June, VLSI Research CEO Dan Hutcheson wrote in the July Chip Insider newsletter that the session prompted him to think that SLT “may well be the next major revolution in test equipment…The essential argument is that test is becoming a more important enabler going forward versus its decades-long position as a cost center to be pushed down. What has changed is the increasing complexity of SoCs and SiPs, the introduction of advanced packaging, chiplets and high-bandwidth memory.”

A July report issued by Mitsubishi UFJ Morgan Stanley Securities noted, “Recently, we have seen an increase in demand for the testing of semiconductor devices at the system level, in addition to the wafer and package levels, as temperature and voltage fluctuations place them under severe stress when they are used in applications such as data center servers. There is similar testing demand from the makers of storage and mobile devices and automotive systems, and we believe this will provide a fresh source of growth for Advantest.”

The mega-markets shown in Figure 3 represent mission-critical applications for SLT. Advantest has established itself as a leader in SLT solutions for the computing, memory and storage, and mobile markets, with systems in production performing massively parallel SLT for these applications, and we continue to sustain and grow our leadership in these areas. The automotive space is a new domain where we are now focused on expanding our SLT business.

Figure 3. Memory & storage, computing, mobile and automotive markets are the four mega-markets driving system-level test.

We are already working with leading customers in Europe, the U.S. and Japan who are seeking automotive SLT solutions, primarily for advanced driver-assistance systems (ADAS) and infotainment. One customer developing automotive microcontrollers is experiencing some returns from the field that were not detected in the standard traditional final test steps. They must expand test coverage to close these gaps. Unlike with mobile phones, one failure per million devices can be disastrous or even deadly in the automotive space, so chipmakers must be able to ensure the quality of their devices when installed. Quality over time is particularly important, as the final product lifetime can be 10 years or more.

Advantest’s SLT capabilities 

Advantest SLT test cells are based on modular building blocks, as shown in Figure 4. The first step involves collaborating with the customer to develop a customized application board to ensure accurate reproduction of the system environment’s conditions while optimizing for high volume production. Next comes automation, the degree of which differs, depending on target production test time and required parallelism. High-volume devices require a much greater amount of parallel testing to meet cost-of-test objectives.  

Figure 4. Advantest’s SLT approach involves modular test-cell building blocks.

The third piece is the thermal environment, which depends on device power and test stress requirements. As the figure indicates, Advantest offers a range of thermal-control technologies: pure passive ambient, tri-temperature active thermal control (ATC) with air cooling, and tri-temp ATC with liquid cooling using rapid temperature switching methods (RTS). Devices are tested independently at controlled temperature. As newer-generation devices tend to consume high power, each needs its own thermal controller and sensors to ensure stable test temperature and prevent device failure. Examples include HPC devices, which can consume over 300W each. ADAS applications require a great deal of power to process data generated by vehicle cameras. When tested, these automotive processors must be heated up without exceeding the maximum junction temperature of 125-130 degrees.

Our SLT solutions also share a common software framework called ActivATE™, which enables test programs to be reused easily. ActivATE™ comprises an integrated development environment (IDE), a test sequencer, and a device manager, and allows test engineers to rapidly create and deploy test programs using standard programming languages.

These building blocks have been assembled by combining our existing proven SLT offerings with some strategic acquisitions. In late 2018, the semiconductor test division of Astronics became part of Advantest, adding massive parallel test solutions to our arsenal. Parallel testing is essential for minimizing the cost of test for SLT, as is mitigating handling limitations of pick-and-place technology. Astronics developed systems with slots that can test hundreds of devices in parallel with virtually 100-percent multi-site test efficiency.

This is a must-have for high-volume manufacturing of mobile and high-performance computing (HPC) products. While automotive volumes are not as high, the electronics in cars are increasing, so here, the requirement is covering multiple variations of devices – i.e. a main design with some customization. This requires the ability to test more small lots with diversified packages and variations of a main device family, and we can now handle these different packages and fully parallel-test them in one system. 

Exemplifying our building-block approach, we developed in less than one year the 5047, our dedicated SLT test cell consisting of our standard M4841 logic handler docked to a 547 SLT system to perform SLT for lower-volume automotive devices with limited parallelism requirements (x8 or x16). These devices run at low power with short test times (tens of seconds to a few minutes), so the standard pick-and-place handler can cover them satisfactorily. Its tri-temperature thermal environment (-55 to +155°C) supports both hot and room temps; cold temps require some further design accommodation for condensation abatement. 

This past January, we also acquired Essai, Inc., adding its test sockets and thermal-control units to our portfolio. The same macro trends pushing processors to higher speed, higher power and higher complexities demand that our SLT platform be tightly integrated with the socket design.   We are currently integrating Essai’s offerings into our end-to-end solutions and will soon be able to offer SLT test cells with socket-accuracy and performance assurance.

Figure 5. Advantest is uniquely qualified to provide all aspects required for high-volume SLT.

As SLT demand becomes more widespread, it is an exciting time to be part of the test industry.  As Figure 5 depicts, Advantest is uniquely situated to provide our valued customers SLT cells with the right communication protocols, power, automation, active thermal control and worldwide service and support.  We look forward to continuing to share our progress in further building this already-vital part of Advantest’s business.

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Enabling Smart Manufacturing

 

By Tan Cheak Hong, Technical Pre-sales Manager, Advantest

Widely considered the next industrial revolution, smart manufacturing is quickly becoming an important aspect of semiconductor production and test. Combining the physical and virtual worlds, a smart plant can operate at higher levels of productivity and energy efficiency and turn out higher-quality products.

Today’s typical manufacturing site, however, incorporates a number of inefficiencies that can interrupt the manufacturing flow and impact the test process, potentially affecting test times and costs. The typical production test flow shown in Figure 1 illustrates some of these factors.

Figure 1. A typical test flow can be impacted by several factors that create operational inefficiencies.

The first factor is the test program itself. If the program is developed upstream on an engineering-level tester, it may not be optimized for downstream implementation, as the OSAT provider may have more limited resources for production. Next, human error can be introduced when an operator or engineer manually inputs the production lot information to set up the tester and handler. 

Further challenges can arise if there are errors in the position settings on the handler, so that it’s not optimized for production, which may cause it to jam. Physical problems are created when parts are loaded into handlers and waiting to be tested because of limited valuable space currently available on the test floor, or equipment breakdowns cause unscheduled downtime. Another issue is when a tester is localized with no connection to the back-end system; all data is stored in the local tester, filling up the hard disk and causing a slowdown and system crash if it is not monitored. Data that is collected but never utilized is a waste of resources.

Finally, additional opportunities for human error are introduced when lack of automation means that an operator just clear a jam or, at the end of a lot, perform a manual count and then reload the system for retest. Having to pause the flow so an operator to come and take care of these problems is highly inefficient. 

In a smart test site, these problems are eliminated. No human error occurs because the entire process is automated, from the start of the lot to execution of the test program. Everything is connected all the way through to ensure smooth operation and efficient use of resources.

Getting to automation

Advantest has developed a concept for through-factory solution to aid in automating the flow, from test cell to production (Figure 2). The manufacturing execution system connects an automated guided vehicle (AGV), used to move material efficiently through the line, to the integrated test cell “Virtual Gem,” or VGEM, Advantest’s patented SECS/GEM Interface Solution for factory automation. VGEM can be easily customized to meet a customer’s specific SECS/GEM requirements, and enables full factory automation with Advantest tester platforms. 

Figure 2. Advantest’s automated test flow solution resolves inefficiencies to enable optimized operation.

The Easy and convenient Operation ToolS (ECOTS) enables evolutionary factory automation. The smart test cell collects and integrates data from the handler and tester and then feeds it via data interface to the cloud, where AI techniques are used to analyze the data based on learned test conditions and provide actionable results. For example, AI can be applied to the measurement data to analyze prober pin cleaning, probe card lifecycle, probe quality, and other parameters. The tester incorporates a sensor to handle all the data moving through it so that the data collection and analysis can be performed quickly and seamlessly.

The ATE is also equipped with Advantest’s TP360 software toolset designed to enhance productivity. This value-added software performs test program debug/optimization and correction, helping speed up the test program release process. From there, the results are fed out to the EM360 equipment-management toolset. This smart toolset helps improve overall equipment effectiveness (OEE), system utilization, time to quality and time to market.

Figure 3 summarizes all the capabilities and efficiencies enabled by ECOTS. The solution was initially developed for the T2000 SoC/mixed-signal platform, and has now been ported to the V93000, T6391 and, soon, the Memory platform, allowing smart manufacturing techniques to be implemented for virtually any type of device.  Key benefits include automated recipe and equipment setup, wafer-map display, efficient resource management, improved uptime, real-time bin monitoring and equipment control, and statistical process control (SPC) capabilities, which use real-time data mining to adapt and evolve the flow to eliminate low yield, continuous fail/stop and other problems that can bring production to a halt.

Figure 3. Advantest’s ECOTS test cell solution is highly customizable and delivers a range of ease-of-use benefits to the user.

As automation becomes more widely integrated into the test flow, smart manufacturing techniques will become essential to ensuring the process is efficiently managed. Advantest has developed a unique solution, combining its proven ATE and handler technology with new proprietary software and interfaces, to enable customers to optimize their test flow, streamline test times and costs, and bring the new products to market more quickly

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