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Next-Generation Vehicles Pose Automotive Semiconductor Test Challenges

By Jerry Koo, Advantest Korea Co., Ltd., Business Promotion Division, Team Leader

Introduction

Various market trends are driving requirements for automotive semiconductor test as technology increasingly defines the future of the automobile. According to IHS Markit,1 the total market for semiconductors, having reached nearly $500 billion in 2018, will grow at a CAGR of 4.88% through 2022, while the automotive electronics category, reaching more than $40 billion in 2018, will outpace the total market, growing at a CAGR of 8.74% through 2022.

This market growth accompanies a paradigm shift toward the technologies that define the future of next-generation vehicles.

Alternative propulsion systems include hybrid and EV drivetrains and will require a new charging/refueling infrastructure, possibly including wireless charging, and will be accompanied by efficient motor drives, car weight reduction, and a move to 48-V batteries. To ensure high quality, it will be necessary to thoroughly test sensors, MCUs, power devices, power-management ICs, and other related components.

Connected cars will feature IoT, GPS, and cellular connectivity to enable infotainment and telematics functionality while integrating media, smartphones, and apps. Communications will extend beyond the car to other vehicles and infrastructure and to datacenters in the cloud.

Vehicles will also require various highly accurate sensors to enable ADAS and fully autonomous vehicle functionality. Complementing cloud connectivity will be high-speed networks within the car and onboard high-performance computing. Technologies will evolve from driver assistance in 2015 to automation (with the car operating as a copilot) driven by sensor fusion in 2020 and on to fully autonomous operation in 2030.

All these technologies will impose on auto manufacturers cost-management and product-planning challenges on the factory floor, in the car, and throughout the supply chain, leading to zero defects from the process to the field.

High voltage and parallelism

High-voltage semiconductor processes for automotive propulsion and cost management include 0.32-μm to 1.0-μm high-voltage (700 V) bipolar-CMOS-DMOS (BCD), 0.18-μm to 0.32-μm (200 V/300 V) SOI BCD, and 0.18-μm to 0.35-μm (80 V/150 V) BCD. Semiconductors fabricated in these processes serve applications areas extending from EV and HEV powertrain to braking, airbag-deployment, and other safety/body functions.

To test such semiconductors, Advantest offers T2000 IPS test modules, including the MMXHE (120 V), the MFHPE (300 V), and the SHV2KV (2,000 V) as well as the EVA100 Evolutionary Value-Added Measurement System, which offers analog VI sources providing outputs to 96 V as well as medium- and high-power VI sources offering outputs to 128 V and 2,000 V, respectively (Figure 1).

Figure 1. T2000 and EVA100 modules facilitate the test of semiconductor devices for a variety of automotive applications, from the powertrain to safety and body systems.

Compared with alternatives, the T2000 MMXHE enhanced multifunction mixed high-voltage module offers a simple board design with high parallelism, including 64 cross-functional ports, offering PMUs, 10-ps-resolution TMUs, 32 digitizer channels, and 32 AWG channels. It supports IDDQ test as well as 20-bit differential voltage measurements.

The T2000 MFHPE multifunctional floating high-power module can operate in single, gang, and stack configurations with up to 18 channels or 36 ports per module to support multisite test.

T2000 IPS supports highly accurate and highly parallel automotive PMIC test, with only two modules able to perform DC/DC converter tests, LDO tests, and MCU I/F functional tests. A key benefit of the T2000 IPS is its minimization of test-board components (such as buffers and electromechanical relays), thereby simplifying PCB design and maintenance (Figure 2).

Figure 2. The T2000 IPS minimizes the number of components required on a test board, thereby easing board design and system maintenance.

Sensor test

Autonomous vehicles present the need to test highly accurate sensors, including CO2 sensors, airbag pressure sensors, vehicle-stability-control (inertial) sensors, and pedestrian pressure sensors. Automotive angle sensors (for electric power steering and integrated starter-generator applications) present particular test challenges, requiring extensive screening to ensure accuracy and reliability. For such applications, the Advantest EVA100 provides the necessary fF and pA testing capabilities.

Electric, hybrid, and plug-in hybrid-electric vehicles also incorporate current sensors to monitor main and auxiliary batteries as well as inverters, motors, and chargers. Conventional methods of testing these sensors, including the use of current clamps or Helmholtz coils, have drawbacks. The Helmholtz-coil method, for example, presents challenges related to magnetic flux intensity and uniformity, and it requires a large chamber (1.5 x 1.5 x 1.5 m) to keep the coils and DUTs at the required -40°C temperature. In contrast, a new high-current sensor-test method based on the Advantest EVA100 offers a 20-fold size reduction (600 x 500 x 300 mm) while testing four DUTs in parallel. The method employs dual-fluid direct temperature control; electromagnets apply guaranteed magnetic flux levels to the DUTs.

SiPs and system-level test

Connected cars are driving a trend toward the increasing integration in automotive modules, SiPs, and SoCs. Such devices increasingly integrate processors and memory as well as imaging, magnetic, or pressure sensors; power devices and MCUs; memory and MCUs; MCUs plus baseband and RF circuits as well as antennas; and motor drivers and MCUs. SiPs present many technical test challenges related to interposer connectivity, warpage, die shifting, die-to-die communications (with marginal timing), limited test ports on the package, package handling, and stress related to level, timing, and processing.

Such highly integrated devices impose stringent test requirements. System-level test (SLT) can play a role in boosting quality, coming after wafer sort and final test and before installation in the end product. However, legacy SLT environments based on rack-and-stack equipment can be cumbersome and slow. In contrast, the Advantest T2000 SLT Solution automates SLT, enabling a compact SLT cell for high-mix low-volume devices or a large-scale SLT cell for ultrahigh-volume production and long SLT times.

Conclusion

From sensors and processors to power-management and motor-controller ICs, semiconductors for next-generation automotive applications will present significant test challenges, including SLT. Advantest’s T2000 IPS and EVA100 systems are available today to meet the test requirements of the devices that will serve in tomorrow’s hybrid, electric, and autonomous vehicles and the infrastructure that supports them.

Reference

1. “Semiconductor Application Forecast AMFT Intelligence Service,” IHS Markit Technology Group, Q4 2018.

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Looking to the Next (5th) Generation

By Judy Davies, Vice President of Global Marketing Communications, Advantest

The global semiconductor business is constantly on the lookout for the “next big thing”: the mass-market killer app that will drive the next wave of market growth for our industry. While candidates abound – thanks to the continued rise of applications utilizing technologies such as flexible sensors and augmented reality – the new NBT is shaping up to be the next generation of highly efficient 5G mobile networks. Long promised and finally on the cusp of coming to market fruition, 5G will far surpass current 4G LTE technology in both its highs (speed) and lows (latency).

With more than 14 billion connected devices predicted to come into use this year (according to Gartner, Inc.), advanced 5G networks will provide the scalability and energy efficiency necessary to serve the skyrocketing amount of connections. The five major sectors that Advantest sees driving rapid development and adoption of 5G technology are automotive, medical, retail, mobile and Big Data. Each will benefit significantly from 5G’s inherent advantages, which include broader connectivity, speedier response times, greater memory capacity and – everyone’s favorite – longer battery life.

However, the new applications that 5G will enable, such as mobile broadband and massive Internet of Things (IoT) connections, will require new approaches. One key need is network slicing, which entails delivering multiple network instances (such as 4G LTE and 5G) over a single common infrastructure. This technique will provide the flexibility and cost efficiency customers demand while reducing their cost of ownership, as well as facilitating development of new networking products and services.

Another major benefit of 5G is that, while providing much faster signal speeds over greater bandwidths, it will also optimize the benefits associated with lower-speed operation – a “speed as needed” capability, as it were. In the case of IoT devices, 5G allows narrow-spectrum operation in order to achieve connectivity over greater distances while conserving power usage. Connected devices that don’t require constant monitoring, for example, can check in with the network on an as-needed basis so they are not consuming power constantly. This efficiency will go a long way toward preserving and extending battery life.

When 5G is fully implemented, signal latency will drop below 10 milliseconds, yielding network operating speeds up to 100 times faster than what we experience today. This low latency will not only benefit current applications but will also enable numerous next-generation, mission-critical applications, including industrial automation, virtual and augmented reality, online health and medical services, and aerospace and military systems.

Among the aspects of 5G that remain to be worked out is the question of industry standards. Thanks to the massive number of networked IoT devices, connectivity standards must evolve to accommodate much higher connection densities than have ever been required. Specifications indicate that 5G networks will be able to accommodate as many as 1 million connected devices packed into an area of 0.38 square mile, compared to around 2,000 such devices on today’s networks.

Advances must also be made in edge computing to avoid data overload and reduce round-trip latency. Literally, this refers to processing data near the edge of the network on smart devices instead of in a centralized cloud environment. By applying edge computing to information collected by IoT sensors, the findings can be pre-processed and only selected data passed along for central processing. This will aid in managing the immense increase in data that is coming with 5G.

The good news is that, despite these remaining hurdles, it’s clear that there is a finish line in sight. In the new 5G world, the winning companies will be those that collaborate and align with their customers to design and create 5G components that will enable the fast-approaching new world of computing and communications.

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Adaptable, Modular Platforms Are Key to Future-Focused Test

By GO SEMI & BEYOND Staff

The electronics industry evolves continually, introducing potentially disruptive technologies and driving new applications at a pace that requires companies to respond quickly and nimbly. Being able to recognize trends early on and provide solutions that can adapt to meet emerging demands is key to remaining competitive.

This is especially true of suppliers to the semiconductor ecosystem, including test and measurement solution providers, who must be able to meet the increasingly stringent testing requirements associated with devices developed for everything from smartphones and displays to AI and automotive applications.

A dominant trend is the demand for smart portable devices such as smartphones and tablets to deliver processing performance without significantly compromising battery life. A long battery-charging interval is a huge differentiator that can make or break even the most promising products and technologies. Simply put, people demand long battery life, but still crave faster, smaller, more feature-packed devices with power-hungry connectivity technologies like 5G.

However, solving one problem often produces another. This axiom applies to developing more sophisticated devices, where testing, especially system-on-chip (SoC) testing, has come up against such daunting challenges as higher voltages, data encryption, low-leakage battery-powered designs, more complex chips, and rapid development cycles. Yet test technology providers need to continue to meet the demand for low-cost solutions in high-volume manufacturing environments. Today, the testing space is defined by a broad range of different applications, requiring a similarly large variety of test methodologies. By looking ahead, companies can position themselves early on to benefit over the course of a product’s lifecycle.

Autonomous cars and e-mobility are leading trends that are under continuous development. These applications have evolved rapidly over the past few years, with the number of electronic components in today’s vehicles having rocketed into the near-triple digits. From infotainment (car navigation, center console control) to autonomous driving (image sensors, AI) to vehicle control (driving assistance, tire pressure monitoring, engine control), this market offers phenomenal potential, both current and future. The more innovations that are developed, the more markets created and the greater the demand. Ensuring automotive-grade, zero-defect quality is essential to guaranteeing safety, reliability, and market success.

Enabling high-quality testing

Advantest has a wide portfolio of solutions with the flexibility and capabilities essential for expanding into sectors where innovation is on the rise. These solutions are all designed to contribute to improving test quality and flexibility while lowering test costs.

The V93000 system is configurable to match device needs, providing DC, digital, analog and RF capabilities on one tester platform. As testing needs change and develop over time, the platform can adapt with the addition of new modules to expand functionality. The RF solution, for example, can accommodate a wide range of devices with varying levels of complexity (such as mobile phones, navigation systems, Wi-FI- and Bluetooth-enabled devices, and IoT systems) – testing up to 32 devices or RF ports in parallel.

Complementing the platform with the power analog FVI16 card enables flexible and transparent high-quality power testing (see Figure 1). The card, which is mainly used for automotive, industrial and consumer mobile charging applications, utilizes shorter test pulses, which prevents heating up the tested device and saves test time, and features a digital feedback loop design for accurate and reliable measurements. It also houses test processor technology with 16 units per card, enabling customers to run tests in parallel, time synchronized and with high throughput.

Figure 1: The V93000- FVI16 floating power VI source for testing power is used primarily in the automotive, industrial, and e-mobility markets. (Source: Charlene Perrin)

The Wave Scale RF, MX, and MX HR channel cards are used on the same platform for multi-site and in-site testing of RF and mixed-signal devices. The cards, which each have different capabilities, bandwidths and application targets, were specifically developed to be adaptable to future device test demands.

The T2000 test platform, with air and liquid dual capability, is also available for many different applications, including IoT/module test solutions, automotive and power-management IC (PMIC) solutions (Figure 2). This single test platform can cover all segments, including mobile charging technologies, automotive applications-specific standard products (ASSPs), and battery monitoring. It features high parallelism and multi-site test technology for measuring devices under test (DUTs). The platforms benefits, in addition to reducing test costs and time to market, include providing consistent quality and traceability.

Figure 2: The flexible T2000 test platform performs high-volume, parallel testing of a wide range of SoC devices. (Source: Advantest)

Primarily focused on the automotive and consumer markets, Advantest’s SoC pick-and-place handling systems handle fine-pitch devices while applying precise temperatures. The M4841 system features individual thermal accuracy with high reliability, contact force and throughput. It can operate across a wide temperature range, with very low jam rates. The M4872 has active thermal control with a vision alignment option and fast temperature boost. It also has high contact accuracy and high-power dissipation, to help optimize yield. This system provides failure detection for applications that demand the highest quality.

As technologies evolve into more demanding and complex systems with higher performance capabilities, the future of semiconductor testers will require ongoing development. Advantest is one company that intends to grow along with these and other future innovations, adhering to its strategy of keeping test costs low while delivering high-quality, reliable testing solutions.

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Parallelism Reduces Cost of Test for IoT, 4G, 5G, and Beyond

By Dieter Ohnesorge, Product Manager for RF Solutions

Introduction

The proliferation of the Internet of Things and the move from 4G to 5G is bringing about pressing test problems. The challenges will increase as billions of IoT devices incorporate GPS, Bluetooth, WLAN, NB-IoT, LTE-A, LTE-M, and other connectivity technologies and as smartphones begin connecting with 5G networks. Applications extend from M2M communications to fixed and mobile wireless access in smart cities. Venues for deployment will extend from factories and vehicles to stadiums and airports.

Transceiver chips for such applications include an increasing number of bands and RF ports carrying high-quality signals. The result can be longer test times leading to increasing cost of test.

Parallel test flow

Many transceivers have architectures that support testing paths and bands in parallel to reduce the cost of test with test techniques that are closer to mission mode, with the test mimicking real-life operation. For example, while you are making a phone call in your car, your smartphone is connected to a cell tower but also to your hands-free Bluetooth connection. You are also likely navigating by GPS and may use a WLAN connection to download a video for your kids to watch. All these functions are taking place in parallel, and an effective production-test strategy should come as close as possible to applying these mission-mode parallel operations.

Traditional “serial” test-flow techniques, based on a fanout RF architecture with shared stimulus and measurement resources, cannot cost-effectively test complex devices. For an LTE-A transceiver with carrier aggregation, a serial test approach would need to test the various uplink and downlink channels sequentially in a series of RF stimulus and baseband measurement operations followed by baseband stimulus and RF measurement operations—leading to long test times.

An alternative is the parallel test flow, enabled by an architecture incorporating independent RF subsystems with truly parallel stimulus and measurement ports. A parallel test flow can speed the test of multiple ports in a single device and can also support multisite test.

WSRF LTE-A/RF combo device test example

The parallel test technique is enabled by instruments such as the V93000 Wave Scale RF (WSRF) card, which offers test-processor-based synchronization and parallel mission-mode test capability. WSRF can simultaneously test multiple transceiver channels in parallel, thereby improving multisite efficiency (MSE) and significantly reducing test time.

The WSRF includes four independent RF subsystems on each card, with 32 truly parallel stimulus and measurement RF ports per card. Each RF subsystem includes an embedded arbitrary waveform generator and digitizer. The WSRF supports 16x multisite test with native ATE resources and includes embedded RF calibration standards.

For less demanding IoT applications, the WSRF scales down to one RF subsystem for use in an A-Class V93000 system. The WSRF can scale down for IoT, enabling it to perform quad-site testing based on one-fourth of a card using just one RF subsystem. At the other end of the spectrum, you may need four WSRF cards to cover the different needs for both sub-6-GHz and mmWave frequencies.

A concept study involving an LTE-A RF transceiver/RF combo device with 802.11ac support and a 3G/4G front-end module showed that the WSRF resulted in test-time improvements of up to 50% as compared with the PSRF, the predecessor to the WSRF.

Figure 1 (not to scale) depicts receive-channel, transmit-channel, and other tests performed serially (top) and the same tests using a mission-mode parallel technique (bottom). Parallel mission-mode test coupled with test-processor-based synchronization can provide a 40% to 60% test-time reduction. Figure 2 provides specific test-time-reduction values for testing parameters such as gain and EVM in single- and quad-site formats, showing MSE and test-time improvement. The results are based on similar setups and sample rates, with the patterns used being the same.

Figure 1. A serial test technique (top) cannot cost-effectively test complex devices, whereas a parallel mission-mode test (bottom) can result in a 50% test-time reduction.

 

Figure 2. This overview shows multisite efficiencies (MSE) and test-time improvements for parallel vs. serial receiver tests.


Testing 802.11ax

Test of 802.11ax devices offers another example of the benefits of parallel test flow. The successor to 802.11ac, 802.11ax offers an expected fourfold increase in user throughput. Designed to improve overall spectral efficiency in dense deployment scenarios, 802.11ax incorporates multiuser MIMO on the downlink and uplink. It operates in both the 2.4-GHz and 5-GHz ISM bands.

These characteristics impose significant ATE challenges. Multiuser MIMO places more demands on RF/analog resources, resulting in longer test times. ATE RF and baseband instruments (AWGs and digitizers) must accommodate the standard’s 160-MHz bandwidth, and the 1024 QAM modulation scheme demands improved phase noise and linearity.

An eight-site test of an 802.11ax transceiver operating in the 5-GHz band with 4×4 MIMO demonstrates how Wave Scale technology and SmarTest 8 software can test over 4,000 test items, including transmitter, receiver, power-detection, DC, and functional test parameters. The Wave Scale technology includes the Wave Scale RF plus the Wave Scale MX, which includes 16 AWGs, 16 digitizers, 64 PMUs, a hardware sequencer, a real-time signal-processing unit, and a large waveform memory.

Complementing the Wave Scale cards, SmarTest 8 protocol-aware software works directly with user-defined register files and generates a protocol-aware sequence using device-setup APIs with no additional conversion required. The software supports the easy-to-implement flexibleA-Class parallel programming required for concurrent testing. An automated bursting capability works with any type of test, including DC, RF, and digital, and runs as fast as tests based on flat patterns, eliminating the need for manual test-time-reduction efforts, thereby providing an early throughput advantage.

In the 802.11ax example, the Wave Scale instruments powered by SmarTest 8 can test four transmitters concurrently in about 23 ms, vs. 80 ms for a serial-measurement approach, resulting in a test-time reduction of about 70%.

Moving to 5G

5G chips are appearing on the market and can be expected to find their way into 5G handsets and infrastructure equipment in the coming months as 5G deployments roll out. Such devices will increasingly need to rely on parallel test flows to handle the complexities of 5G while continuing to provide backwards compatibility with 3G and 4G technologies, and as they continue to support WLAN, GPS, ZigBee, Bluetooth, and various IoT connectivity applications.

With respect to 5G, new smartphones and other devices will achieve high peak speeds, and 5G will rely heavily on eMBB (enhanced mobile broadband). eMBB will provide not only improved data rates but also broadband everywhere, including in vehicles extending to high-speed trains. Coupled with carrier aggregation, eMBB provides a further example of the benefit for having a parallel test flow that goes hand in hand with test-time reduction and lower COT.

The Wave Scale cards, available now, stand ready to help customers keep pace with the parallel test demands of current and next-generation semiconductor devices.

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Pro Sports: A New Frontier for Prosthetics

Judy Davies, Vice President of Global Marketing Communications, Advantest

Professional sports demand a great deal of the athletes who pursue them, and many of these players willingly give 110%—a commitment that takes on new significance when a physical disability is involved. The National Football League (NFL), for example, has boasted a number of players who have excelled in this physically demanding sport despite missing body parts.

Legendary San Francisco 49er cornerback and free safety Ronnie Lott, who was elected into the Pro Football Hall of Fame in 2000, mangled his pinkie finger during the 1985-86 NFL season. His competitive fervor was such that he opted for amputation of the damaged fingertip rather than surgery and rehabilitation that would cause him to miss multiple games.

Prior to the era of Lott, Montana, et. al, place kicker Tom Dempsey utilized a custom-built football cleat with a flattened front surface to accommodate a birth defect: the lack of toes on his right foot. Dempsey enjoyed a 10-year career in the NFL, and during the 1970-71 season, he kicked a 63-yard field goal while playing for the New Orleans Saints—a record that remained unbroken until December 2013.

This year, the Seattle Seahawks selected, as one of their draft picks, defensive player Shaquem Griffin out of the University of Central Florida. Griffin has no left hand, having been born with a congenital condition called amniotic band syndrome that necessitated amputation of his underdeveloped left hand at the age of four. However, Griffin’s performance in college, particularly the Senior Bowl in January, greatly impressed pro scouts, and at the NFL Combine event, he bench-pressed 225 pounds 20 times, using a prosthetic hand to grasp the bar. It’s not yet clear whether the NFL will allow Griffin to wear an artificial hand during games—does such special equipment give a player an unfair advantage, or does it simply help level the playing field?

One thing that isn’t in question: prosthetics technology continues to grow in sophistication. Advances in medical knowledge and kinesiology, together with smaller, more efficient microelectronics and longer battery life, are producing such remarkable devices as prosthetic fingers that enable the dexterity and control a wearer needs to perform everyday tasks most of us take for granted.

Dr. Hugh Herr, director of the biomechatronics group at the Massachusetts Institute of Technology’s Media Lab, is a leading pioneer in engineering bionic limbs A double amputee himself, Dr. Herr has designed high-tech prosthetics, such as his computerized BiOM ankle, that restore users’ ability to pursue such activities as running and swimming. Dr. Herr’s focus is on improving the human-machine interface of prosthetics to reduce users’ pain and frustration.

The ultimate goal is to apply advanced semiconductor technology – including sensors, computers and MEMS – to link artificial limbs with the human nervous system. Dr. Herr will share further details regarding his research and its applications when he delivers the keynote address next May at Advantest’s annual VOICE Developer Conference.

Of course, to go along with the nervous system, as the old song says, “You gotta have heart.” Consider the words of Tom Dempsey, whose reported response to those complaining his custom cleat gave him a competitive advantage was, “Unfair, eh? How about you try kicking a 63-yard field goal to win it with two seconds left and you’re wearing a square shoe – oh yeah, and no toes either.” Talent, technology… and heart. Sounds like a winning combination.

Judy Davies, VP Global Marketing Communications

 

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PCIe Gen 4 Is Coming – the SLT Solution Is Here

By Colin Ritchie, Vice President, System Level Test Business, Advantest

The high-tech industry is currently in the midst of what has been widely cited by industry experts and executives as a memory super-cycle. Memory manufacturers, in response to sustained high demand for memory devices – including from the solid-state drive (SSD) market – are adding capacity to ensure their ability to meet this explosive demand.

The test requirements for SSDs comprise a wide range of variables that span many different engineering disciplines, as shown in Figure 1. One of the most challenging is the variety of protocols implemented, which vary widely in functionality and performance. Having noted this, it’s clear that the industry is moving toward newer, faster data-transfer protocols.

Figure 1. SSD test requirements include a wide range of variables.

SSD makers have traditionally utilized Serial ATA (SATA) or Serial Attached SCSI (SAS) – both of which, while still in use, are showing signs of age. However, the more compact and easily implemented PCI Express (PCIe) protocol has become highly popular, both in standalone mode and as a transport mechanism for the Non-Volatile Memory Express (NVMe) protocol (which is optimized for NAND flash next-generation NVM technologies).

While the third generation of PCIe (Gen 3) has met with notable success, the industry has been waiting for Gen 4, as it delivers capabilities previously unattainable with other SSD protocols. The new PCIe Gen 4 standardized data transfer bus will double the per-lane data transfer rate of the prior Gen3 revision from 8.0 gigatransfers per second (GT/s) to 16.0 GT/s. As a result, data transfer rates of up to 2GB/s (gigabytes/second) can be achieved with just one PCIe Gen 4 interconnection, and up to 16GB/s with an 8-slot PCIe Gen 4 interconnection for graphics cards and high-end SSDs.

The greatest beneficiary of this new implementation of PCIe will be the burgeoning Big Data arena. With the advent of the IoT and “smart everything,” a host of applications are churning out data in massive volumes. With its speed and capacity, PCIe Gen 4 will dramatically boost server throughput. At the same time, it will also place even greater demands on system-level testing (SLT), which has evolved rapidly to meet growing industry requirements for protocol testing at the system level. In the highly competitive SSD market, a test system that supports multiple protocols can eliminate the need for retooling and help speed transitions between product generations.

Another industry first for system-level test

Advantest’s proven platform strategy is ideally suited to system-level test. Both standard and custom solutions can be economically configured with the implementation of modular components developed for the platform. Its modularity and adaptability also are essential for optimizing manufacturers’ factory-floor configurations to accommodate new product generations – changes can be made quickly and efficiently with a minimum of disruption to the manufacturing process.

The flexible MPT3000 SLT platform was designed to meet customers’ testing needs for both enterprise and client SSDs. Already used by leading manufacturers of PCIe Gen 3, SATA and SAS SSDs, the MPT3000 portfolio has again expanded to accommodate the newest generation of PCIe.

On August 1, Advantest announced its latest industry breakthrough: the first fully integrated test solution for developing, debugging and mass producing PCIe Gen 4 SSDs on the MPT3000. The all-inclusive test solution enables SSD manufacturers to accelerate their newest products’ time to market.

The newly expanded MPT3000 platform is available in three configurations that enable it to cover all test insertions for PCIe Gen 4 devices (Figure 2), without waiting for third-party PCIe Gen 4 infrastructure to be commercially available:

  • MPT3000ES for engineering applications and program development
  • MPT3000ENV for reliability demonstration testing (RDT) and quality assurance (QA)
  • MPT3000HVM for high capacity and throughput in high-volume manufacturing.

Figure 2. The MPT3000 platform can be implemented at every stage of SSD test.

The holistic MPT3000 platform streamlines the transition to PCIe Gen 4 by offering users a test flow that spans design to manufacturing and uses the same tester architecture and software as the proven PCIe Gen 3 offering – giving SSD manufacturers access to the fastest, lowest-risk path to market. Its tester-per-DUT [device under test] architecture and hardware acceleration make the MPT3000 a single-system solution for virtually all engineering, volume production and built-in self-test (BIST) applications.

The newest evolution of PCIe motherboards is expected to begin hitting the market within the next six to 12 months. Developers integrating PCIe into their products need a reliable test solution today to ensure they are able to hit this market window. They need look no further than the MPT3000 PCIe Gen 4 solution from Advantest – available now and already shipping to customers.

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