New AI-Powered Software Solution Accelerates Yield Improvement Throughout IC Engineering and Production

Advantest’s new yield-improvement solution leverages artificial intelligence (AI) to expedite identifying the root causes of yield loss and increasing the efficiency of analyzing test results. The innovative and scalable Advantest Cloud Solutions Engineering AI Studio for Yield Improvement (ACS EASY^TM) can increase the productivity of both device engineering and production operations for a wide range of users, from chip designers to outsourced semiconductor assembly and test (OSAT) companies.

Device yields are key performance indicators in semiconductor production, requiring continuous engineering efforts to debug and fine-tune. The unique ACS EASY application uses AI to automatically monitor test conditions and inferences to isolate and analyze the causes of yield degradation. This resolves production issues in a timely fashion, slashes troubleshooting time and dramatically reduces test workloads for data analytics.

ACS EASY is capable of handling huge volumes of data to compare new lots’ test results with those of previous lots to quickly identify abnormal bin trends. The solution’s GUI facilitates the online sharing of test results, eliminating the need to create separate reports. Moreover, ACS EASY is intuitive to use and does not require operators to have familiarity with AI, machine learning, data analysis or statistics.

ACS EASY utilizes prescriptive self-learning to categorize new yield-related issues for future monitoring and analysis. This further extends the system’s stored knowledge base, allowing inferencing applications to present bigger values.

“It has long been anticipated that the use of AI and advanced data analytics would allow IC testing to make great strides forward. That time is now with ACS EASY, a low-cost system that is simple to install and easy to use, enabling test engineers to master data without being data scientists,” said Titan Chang, Advantest’s Field Service Group executive vice president.

T6391 Display Driver Tester Expands Capabilities with New Per-pin Digitizer and Comparator (LCD HP)

Advantest announced its new LCD HP (high-performance) per-pin digitizer and comparator module. Developed for use with the T6391 display driver test system, the LCD HP module features two key performance improvements. First, it improves measurement precision 5x compared to the previous module, making it ideally suited to accommodate the testing demands of advanced display driver ICs (DDICs) for high-end smartphones and augmented/virtual reality (AR/VR) applications. Second, it can handle high-voltage testing up to ±40V, enabling the module to address the high-reliability testing demands of brand-new automotive DDICs.

“This is an exciting time for the display market and, by extension, for the test industry,” said Toshiaki Adachi, senior vice president, Advantest SoC Test Business Unit. “As the market for metaverse devices grows, adoption of OLED display panels is expected to escalate, while the shift to EVs calls for automotive displays that centralize cockpit clusters, infotainment and other display functions. All of this technology development is placing new, more stringent requirements on test and measurement. Our T6391 tester and new LCD HP module will lead the way in addressing these demands.”

The LCD HP module achieves noise reduction and uniform measurement accuracy between channels in the test system to enable high-precision measurement. It covers test requirements of new advanced DDICs for high-end smartphone and AR/VR applications, enabling the tester to support high-gradation testing with measurement accuracy of ±200μV. In addition, by supporting high-voltage testing up to ±40V with certain loads, the module enables functional testing of automotive DDICs that reflect their actual operations.

The T6391 LCD HP module is highly compatible with existing modules, enabling fast, easy integration with the customer’s test setup.

New inteXcell Series Offers High-Performance, Economical Test Cells for Advanced Memory ICs

Advantest has launched inteXcell, a new line of minimal-footprint test cells designed to address demanding final-test requirements presented by the increasing bit densities, lower power consumption and faster interface speeds of future memory devices. This new final test cell infrastructure integrates a T5835 memory tester optimized for use in high-productivity test cells and is designed to adopt future memory solutions. With inteXcell, ICs can be tested on the same platform from initial engineering through mass production.

inteXcell is the first ever fully integrated and unified test solution to combine broad test coverage with high-throughput handling in a highly flexible system architecture. Early units can test up to 1,536 devices in parallel with high speed and high accuracy.

The new test cells have a compact structure that enables up to 384 simultaneous measurements per cell and uses only one-third of the floor space occupied by conventional test systems. Since each cell uses independent asynchronous testing, inteXcell can be configured anywhere from one to four testers, enabling high equipment utilization and streamlined cell-based maintenance.

E5620 DR-SEM for Review and Classification of Ultra-Small Photomask Defects Unveiled

In December 2022, Advantest unveiled the E5620 Defect Review Scanning Electron Microscope (DR-SEM), its newest mask SEM product for reviewing and classifying ultra-small defects on photomasks and mask blanks. With its high-accuracy, high-throughput defect review capability, the E5620 DR-SEM is expected to contribute appreciably to production quality improvements in next-generation photomasks and shorter mask manufacturing turnaround times.

Like its predecessor, the E5620 implements Advantest’s highly stable image capture technology to easily import defect location data from mask inspection systems and automatically image the locations. The system has a number of improvements that specifically target future mask requirements.

“In working with our customers to determine their requirements for future EUV photomask inspection and analysis, we identified several essential advancements to integrate into our proven DR-SEM system,” said Toshimichi Iwai, senior VP of the Nanotechnology Business Group with Advantest. “With the E5620, our team of lithography experts has created a superior tool that can handle today’s photomasks and is truly future-ready for the coming EUV generation.”

Advantest Adds System-Level Testing Capability for Advanced Memory ICs

Advantest installed its first enhanced T5851-STM16G tester capable of nonvolatile memory express (NVMe) system-level test coverage at a major manufacturer of IC memory devices. By expanding the capabilities of its established T5851 platform, Advantest addresses the growing market for testing NVMe solid-state drives (SSDs) using ball-grid arrays (BGAs) in automotive applications.

Over the next five years, the automotive market is expected to become the largest consumer of semiconductor devices. This growth is escalating demand for NVMe BGA SSD devices, which are crucial in advanced driver-assistance systems (ADAS). To develop and economically mass produce these key NAND Flash SSD devices, memory manufacturers worldwide need a highly reliable, cost-efficient test solution.

Designed to perform system-level testing of NVMe BGA SSDs, the T5851-STM16G tester is ideally suited for evaluating any generation of BGA SSDs in either an engineering environment or a high-volume production site. The highly versatile platform can handle devices with multiple protocols, including NVMe, UFS and PCIe, at speeds up to 16 Gbps. The system’s modular, tester-per-DUT architecture supports test flows required for system-level testing of up to 768 devices simultaneously. 

Advantest is taking orders for the T5851-STM16G tester. It is available either as a new tester from Advantest’s factory or as a cost-effective enhancement to users’ existing T5851 or even T583X units.

Advantest Introduces Industry’s First Flexible DUT Interface 

Advantest launched its DUT Scale Duo interface for the V93000 EXA Scale SoC test systems, enabling the industry’s highest level of parallelism for testing advanced semiconductors. With this revolutionary interface, the usable space on DUT boards and probe cards is increased by 50 percent or more while wafer probe and final-test setups can accommodate component heights that are more than three times taller.

Advantest offers the industry’s first DUT interface with the capability to adapt either to the existing standard DUT board or probe card size or to switch to the new, significantly larger size. Using a unique sliding mechanism, users can effortlessly switch back and forth between both formats to adapt to specific application requirements.

Along with the new interface, a new super-stiff extended bridge achieves superior deflection performance in direct-probing setups. The unit’s universal design gives it the versatility to support a wide range of applications including digital and RF device testing. With its sophisticated sensing capabilities, the extended bridge delivers the industry’s best planarity and high manufacturing yield, ensuring highly accurate positioning and verification of probe card clamping.

“Our new DUT Scale Duo enables the next stepping in parallelism while embodying Advantest’s continuing emphasis on system compatibility by allowing users to utilize their existing DUT boards and probe cards with a new interface,” said Advantest’s General Manager and EVP, Jürgen Serrer. “In addition to protecting customers’ investments, our approach to delivering the most efficient test solutions also offers flexibility and simplifies fleet management on the test floor.”