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New T2000 AiR Targets Low-Volume Testing of Highly Integrated Modules and SiP Devices

 

Global market demand continues to grow for smartphones and other mobile electronic devices as well as consumer and enterprise services offered over the internet.  This trend is driving the need for increased production of complex semiconductor devices and modules that integrate MCUs and application processors to perform multiple functions, including telecommunications, power management and sensing.

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T2000 AiR

Advantest’s new T2000 AiR system is a compact, air-cooled system optimized for low-cost testing in R&D and high-mix, low-volume production, and offers broad test coverage for these diverse modules and system-in- package (SiP) devices.  With its modular architecture providing maximum flexibility, the tester can be configured with up to six discrete air-cooled measurement modules. This enables single-system test coverage for a wide array of highly integrated, multi-functional devices. Designed to perform digital functions and SCAN testing over as many as 512 channels in parallel, the system can test high-voltage devices up to 2,000 volts, high-precision DC converters, automotive DC devices, mixed-signal ICs with bandwidths up to 100 MHz, RF communication chips and CMOS image sensors.

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T2000 AiR with M48XX Handler

The new tester can be integrated with the M48xx series of handlers to create a highly efficient, zero-footprint test cell solution, which Advantest refers to as its Integrated Zero Test Station.  Because the T2000 AiR does not require water cooling, it can be installed anywhere.  Additionally, the system’s software environment is fully compatible with the highly scalable T2000 series, making it capable of conducting massively parallel testing and facilitating smooth production ramps to help customers reduce their newest products’ time to market.  Shipments to customers are expected to begin in the first quarter of calendar year 2017.

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T5830 Systems Offers Cost-Efficient Testing of High-Volume, Cost-Sensitive Flash Memories

 

Advantest’s newest memory tester delivers full ATE capability and scalable performance to address the booming IoT and smart card markets. T5830 is the latest member of the T5800 product family, and is optimized for testing a wide range of flash memory devices used in mobile electronic devices. The highly flexible T5830 tester has all of the capabilities needed to perform wafer sorting and final testing of price-sensitive flash memories. It uses a scalable, built-in high-current programmable power supply (PPS) architecture that provides the flexibility and economic performance to handle low-pin-count to high-pin-count devices. The system also leverages Advantest’s innovative Tester-per-Site™ design. This allows each site to operate independently, enabling very fast test times and lowering the overall cost of test.

With an operating frequency of 400 MHz, the tester is capable of handling data transfer rates of up to 800 megabits per second (Mbps). In addition, the T5830 can handle up to 2,304 devices under test (DUTs) at one time when configured with four digital pins.

t5800This new tester is ideally suited for handling a wide range of devices including NOR and NAND flash memories that use the standard serial peripheral interface (SPI) protocol, low-pin-count flash devices such as smart cards and single in-line memories (SIM), electrically erasable programmable read-only memories (EEPROMs) and other embedded flash devices.

The T5830 tester is available in both production and engineering models, making the system applicable for qualification testing as well as high-volume production. It is built on the same platform and uses the same FutureSuite™ software as all other members of the T5800 product line. This enhances the system’s reliability and provides modular upgradeability.

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Advantest Announces Dates & Locations for VOICE 2017; Call for Papers Open through Nov. 18

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Advantest has issued an international call for papers on semiconductor test solutions, best practices and innovative technologies for next year’s annual VOICE Developer Conference. The 2017 conference will again be held in two locations — Palm Springs, California, at the Hyatt Regency Indian Wells Resort & Spa on May 16-17, and VOICE will return to the growing China region with an event at the InterContinental Shanghai Pudong on May 26. Both conferences will feature the theme Measure the Connected World and Everything in It.

why-attend-2As VOICE enters its second decade in 2017, the conference will continue to offer attendees comprehensive learning and networking opportunities including technical presentations focused on eight technology tracks, partners’ expositions and social gatherings. In addition, the VOICE Technology Kiosk Showcase will expand to include more interactive discussion sessions for users of Advantest’s V93000 and T2000 system-on-a-chip (SoC) test platforms, memory test systems, handlers, test cell solutions, product engineering and test technology.

For VOICE 2017, Advantest’s call for papers focuses on eight technology tracks:

Hot Topics
Concerns new market drivers and future trends including V93000 Wave Scale RF and MX, automotive power analog, Internet of Things (IoT), emerging wireless standards, and test challenges at next-generation technology nodes.

voice-2017-topics-2Device-Specific Testing
Covers techniques for testing MCUs, ASICs, PMICs, automotive radar, sensors, memory, baseband, cellular, multi-chip packages and more.

Hardware Design and Integration
Includes tester/handler integration, probe and package loadboard design, challenges of new package technologies and fine-pitch devices, and more.

Improving Throughput
Addresses test-time reduction, increased multi-site, multi-site efficiency, concurrent test, and more.

Reducing Time-to-Market
Encompasses DFT, pattern simulations/cyclization, automatic test program generation, system-level test, and more.

New Hardware / Software Test Solutions
Focuses on solutions utilizing the latest hardware or software features.

techsessions_0712Test Methodologies
Involves techniques for testing DC, RF, mixed-signal or high-speed digital devices.

Product Engineering

Includes software and tools for data analysis, test program documentation/versioning and production test elimination techniques.

Sponsorship opportunities are also available.  Please visit the VOICE 2017 website to find out more.

Visit VOICE 2017

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Applying Flexible ATE Technology to Protocol Test and the SSD Market

By Scott West, Global Technology, Innovation and Research Group, Advantest America

The technology applications for which a broad range of connectivity and communication protocols can be employed continue to grow. Manufacturers of end products for these markets increasingly need flexible ATE solutions that they can employ cost-effectively to ensure functionality.

One of the first areas where protocol test has proven successful is the solid-state drive (SSD) market, which is growing rapidly, as shown in Figure 1. In addition to replacing hard disk drives (HDDs) for many applications, SSDs are also expanding into solid-state storage, as they offer advantages with respect to performance, power consumption and form factor, to name a few. While HDDs aren’t expected to disappear entirely – they remain useful for cold storage of data not accessed frequently – SSDs are desirable for fast response time and quick access to frequently used data.

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Figure 1. Unit shipments for the SSD market are expected to approach 300 million by 2020.

While many SSDs started out using SATA at a speed of 6 Gbits/second (Gbps) as HDDs use, the SSD itself can actually support a much speedier protocol than spinning disks. So addition to SATA, the primary SSD protocols are SAS and PCI Express (PCIe). The latter is typically used with either AHCI¹ or NVMe², a communications interface/protocol developed for SSDs by a group of leading drive vendors. Viewed by many as the future of SSD due to its very high speed, NVMe is also intended to lower data latency.

The most direct way to replace an HDD with an SSD is to stay with the SATA protocol.  When companies are looking to make a further upgrade in performance beyond SATA, the least costly approach is to use SAS – it fits the HDD infrastructure, enabling easy swap-out and low impact on infrastructure cost. With PCs, it’s an easy change to go from SATA to PCIe, while data centers will move either to SAS or NVMe, depending on what makes the most sense for the data quantity and access requirements involved. And legacy systems, of which quite a few remain, will continue to utilize SATA. Manufacturers need to look at what’s involved overall in making a change from one protocol to another.

The bottom line is that the three predominant SSD protocols will be in use for the foreseeable future. Because customer demands vary, SSD makers must be able to incorporate these different protocols into their products, and they need a test solution that can easily and cost-effectively handle them all.

Advantest has developed a flexible, scalable platform for protocol test – the MPT3000 – that can easily accommodate varying requirements in form factor, speed and performance. The MPT3000 platform’s advantages are designed to optimize multi-site system-level-test (SLT) of different protocols:

  • Multi-Protocol Flexibility – The MPT3000 uses FPGA-based test electronics, which allows users to download firmware to test SATA and then easily switch over to SAS or NVMe later on. The FPGA’s innate flexibility enables a quick change between solutions, requiring a firmware download that typically takes on the order of just 10 minutes.
  • Performance – The FPGA-based electronics provide tester-per-DUT architecture, combined with Advantest expertise is high speed signally in test environments results in full speed testing of the newer NVMe and SAS SSDs. For existing test solutions whose shared architecture was sufficient for 6G SATA testing, the disruptive higher performance of the SAS and NVMe protocols creates performance challenges that the MPT3000 handles without compromise.
  • Form factor flexibility – SSDs are replacing HDDs, which have a set form factor determined by the spinning disks. With SSD protocols, several form factors are being used (see Figure 2):
    • 2 – longtime 2.5-in. form factor still found in many PCs and laptops;
    • Add-in Card (AIC) – formally referred to as a PC Card, now used for enterprise drives in data centers; allows more content to be included and cools easily;
    • 2 – small, gum stick-sized SSD available in different lengths and versions with standard connector; fast and cable-free, M.2 is well suited for space-constrained setups.

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Figure 2. Traditional 2.5-inch U.2 form factors are giving way to both smaller, more versatile approaches such as M.2 and larger, higher performance AIC (add-in-card) SSDs.

MPT3000 has interchangeable DUT interface boards (DIBs) to allow for quick form-factor changeovers based on customer demand, or other manufacturing flexibility such as the need for fast shipments, or to pursue new business opportunities. This flexibility maintains high utilization of test capacity, and together with the system’s high performance, enables users to slash test times, reducing the cost of test as well as their total test system ownership costs.

  • Global structure – The SSD market hasn’t had this requirement previously, but with its rapid growth in past the few years, global support has become a major concern for SSD manufacturers. Advantest has the expertise and resources to support worldwide deployments. Currently, MPT3000 is the only proven, full-ATE SSD tester on the market. Companies using internal systems can no longer support their own test platforms – in particular, when looking to make the shift from internal SATA systems to NVMe. This is a key inflection point for Advantest.

Advantest introduced the first incarnation of its protocol test system in 2014. The MPT3000ENV conducts performance and stress testing of PCIe NVMe, SAS 12G and SATA SSDs of all major form factors in a thermal chamber supporting up to 256 DUTs running at 25W each, or a total of 6.4kW DUT power dissipation. Its focus is on reliability demonstration testing (RDT), testing a small sample of devices over time to prove that they will last over the desired lifetime (based on number of drives tested, length of test time, temperature/environment, and other variables). Typically, a few hundred devices are run for 1,000 hours at high temperatures, which equals about 3 months of constant read/write operations.

Introduced along with the ENV model, the MPT3000ES engineering station uses the same high-performance electronics and software as the MPT3000ENV, but in a smaller footprint. Used to perform test program development, and device analysis and debugging, it can test up to eight SSDs in parallel, providing as many as eight lanes of 12-Gbps signaling.

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The newest addition to Advantest’s protocol test offerings is the MPT3000HVM, introduced in August. With the first protocol test systems having been used to prove reliability and handle development and debugging, the next step was to provide high-volume functional test capability. The MPT3000HVM supports the same devices as the MPT3000ENV, but with upgrade electronics for twice the parallelism.  Driven by the throughput and cost considerations of volume manufacturing, the DUT-density per floor space of the HVM system is vastly greater than the chambered system, using new closed-loop ambient-air thermal control. The system can also perform asynchronous test – with its rack architecture rather the tray-based RDT system, devices can be plugged and unplugged one at a time as they needed for more efficient tester. And although current SSD volumes are still generally handled manually by operators, the system is automation ready in anticipation of volumes crossing the threshold where a robotic load/unload system becomes economically advantageous.

Advantest has proved its mettle in protocol test via the high-volume, cost-sensitive SSD market. We look forward to targeting future developments in SSD, as well as in further protocol test applications, with our single-platform, flexible, scalable and highly parallel test technology. And we look forward to updating you as those developments evolve.

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Notes:

  1. AHCI – Advance Host Controller Interface
  2. NVMe – Non-Volatile Memory Express

 

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Analog and Power Integration: The Next Level of IoT Test Demands

Analog and Power Integration: The Next Level of IoT Test Demands

By Martin Fischer, Solution Product Manager, Advantest Europe

Next-generation system-on-chip (SoC) designs – many of which are needed for IoT applications – are driving development of a wide range of smart devices with increasingly integrated functionality such as analog sensing, mobile computing, wireless communications and high-efficiency power management. These smart devices contain more analog and power functions than ever before, enabling advances such as longer battery life for handheld mobile electronics and emerging automotive applications for smart and connected cars. At the same time, these devices present new challenges for test equipment.

Analog technology is found in every step of package integration – from single-function ICs to SoCs, completely integrated solutions are enabling further miniaturization, as well as new and higher accuracy and voltage levels (see Figure 1). The semiconductor industry is looking for solutions to achieve faster time to market and lower unit test costs. However, many ATE systems lack the capability to efficiently test all the multiple analog and power functionalities integrated into a single SoC.

Parallel test is key for more complex devices, and this requirement was a driving factor behind the creation of Advantest’s V93000 single scalable platform, with its test-processor-per-pin architecture and modular approach to channel module design. When equipped with the DC Scale AVI64 universal analog pin module, the V93000 can test both analog and digital circuits.  It can handle all smart devices – from low-pin-count ICs to complex, high-density SoCs – by combining power/analog test functions with full test coverage.

The general-purpose AVI64 (see Figure 2) features analog and high-voltage digital capabilities and is optimized for providing a true universal analog pin, covering a wide range of test application needs. An arbitrary waveform generator (AWG), digitizer, digital IO capabilities, and a time measurement unit (TMU) are available per channel. One floating high-current unit with a current of up to ±4 A, one high-resolution AWG, and one floating differential voltmeter are available per group of 8 channels.

The ability to fit 64 channels on one board enables a very high level of integration. When you need to test typical IoT devices, e.g., sensors and MEMS chips, having fewer boards in a tester with very high density allows you to test many devices in parallel – this in turn leads to both high multi-site and lower cost of test. The analog and digital signals of the devices under test (DUTs) are synchronized by the Domain Sync feature, enabling testing of any smart device.

The combination of the V93000 with the AVI64 has allowed Advantest’s customers to achieve industry-leading utilization by combining power/analog testing with full SoC test coverage. This future-ready approach will enable semiconductor manufacturers to address the full range of IoT applications – not only today’s smart devices, meters, homes and buildings, but also emerging smart cities… and whatever comes next.

 

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Figure 1. Increasingly integrated analog and power functionality are creating unique challenges for ATE.

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Figure 2. Advantest’s DC Scale AVI64 universal analog pin module gives the V93000 platform the industry’s broadest capabilities for testing power and analog ICs used in mobile applications.

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